1. Field of the Invention
The present invention relates to electronic semiconductor devices and integrated circuits, and, more particularly, to complementary field effect transistors with heterostructure insulated gates and integrated circuits including them and methods of fabrication.
2. Description of the Related Art
Very large scale integrated semiconductor memory and logic devices are being pushed for ever higher speed switching, lower power consumption, and larger noise margins. Thus there has been considerable effort to combine the intrinsic high switching speed and semiinsulating properties of gallium arsenide (GaAs) with the inherent large noise margins and low standby power dissipation of complementary field effect transistor (FET) logic. Complementary GaAs JFET circuits have shown very low standby power dissipation, but the low hole mobility of GaAs leads to low extrinsic transconductance of the p-channel devices and relatively low switching speeds; see, for example, R. Zuleg et al, 5 IEEE Elec. Dev. Lett. 21 (1984).
High hole mobilities have been obtained in modulation doped aluminum gallium arsenide/gallium arsenide (Al.sub.x Ga.sub.1-x As/GaAs) heterojunction FETs which rely on a channel consisting of a two-dimensional hole gas at the heterojunction; see, for example, H. Stormer et al, 44 Appl. Phys. Lett. 1062 (1984). This is the complement of the modulation doped heterojunction FET which utilizes a two-dimensional electron gas (HEMT, MODFET, etc.). However, the threshold voltages of these modulation doped heterojunction devices depend critically on the thickness and doping concentration of the Al.sub.x Ga.sub.1-x As layer, and reported variations in HEMT threshold voltages across a two inch wafer typically have a standard variation in the range of 0.15 V to 0.4 V; see, K. Arai et al. 7 IEEE Elec. Dev. Lett. 158 (1986). Even the use of pulse doping of the Al.sub.x Ga.sub.1-x As (see. Hueschen et al, 1984 IEDM Tech. Digest 348) does not solve the problem. Consequently, heterostructure insulated gate FETs (HFETs), which use an undoped Al.sub.x Ga.sub.1-x As layer as a gate insulator in a MIS-like structure have appeared; see, P.Solomon et al, 5 IEEE Elec. Dev. Lett. 379 (1984). HFETs have the advantage of uniformity and reproducibility of threshold voltage because the threshold voltage is primarily determined by the gate material and is independent of the Al.sub.x Ga.sub.1-x As layer thickness.
Complementary HFET devices, using a two-dimensional electron gas for the n channel device and a two-dimensional hole gas for the p channel device, have been fabricated on a single undoped Al.sub.x Ga.sub.1-x As/GaAs substrate: see N. Cirillo et al, 1985 IEDM Tech. Digest 317-320. Both the n and p channel devices use tungsten silicide (WSi is used to represent the various silicides of tungsten) Schottky barrier gates on the undoped Al.sub.x Ga.sub.1-x As and are relatively easy to fabricate. However, the threshold voltage for the WSi Schottky barrier gate is about 0.8-1.0 V for the n-channel device and about -0.7--0.4 V for the p-channel device; whereas, for 1 V power supply operation the n-channel threshold should be about 0.2-0.3 V and the p-channel threshold should be about -0.3--0.2 V.
In contrast, K. Matsumoto et al, 7 IEEE Elec. Dev. Lett. 182 (1986), have fabricated complementary HFET devices with Al.sub.x Ga.sub.1-x As as the insulator and n.sup.+ and p.sup.+ GaAs gates for the n and p channel devices, respectively. This yields low threshold voltages (about 0 V), but the fabrication requires a mesa etch and epitaxial refill.
In either case, the threshold voltage may be adjusted by uniformly doping the GaAs layer which would be analogous to the channel implants in MOSFET technology to adjust threshold voltage. However, to adjust the threshold voltage by 0.1 V would require a doping level of about 5.times.10.sup.15 /cm.sup.3, which is too low to be reproducibly controlled by the growth techniques used to fabricate the basic heterostructure (i.e., by molecular beam epitaxy (MBE) or metalorganic chemical vapor deposition (MOCVD)).
Thus it is a problem to fabricate complementary HFET devices with desirable threshold voltages by a simple process.